ds04-27240-1e fujitsu semiconductor data sheet assp for power supply applications (secondary battery) dc/dc converter ic for charging li-ion battery mb39a113 n n n n description mb39a113 is a dc/dc converter ic of pulse width modulation (pwm) type for charging, capable of independently controlling the output voltage and output current. mb39a113 is suitable for down conversion. mb39a113 can dynamically control the charge current of the secondary battery, to keep the power constant by detecting a voltage drop in an ac adapter (dynamically-controlled charging) . mb39a113 can easily set the charge current value, making it ideal for use as a built-in charging device in products such as notebook pc. n n n n features ? built-in dual constant-current control circuits ? analog control of charge current is possible. ( + ine1 and + ine2 terminals) ? built-in ac adapter detection function (fixing the output in the off state when the vcc voltage is lower than the battery voltage + 0.2 v) ? possible to prevent mis-detecting of fully-charged state by constant-voltage control state detection function (cvm terminal) ? built-in overvoltage detection function of charge-voltage (ovp terminal) (continued) n n n n pac k ag e 24-pin plastic ssop (fpt-24p-m03)
mb39a113 2 (continued) ? wide range of operating power-supply voltage : 8 v to 25 v ? output voltage setting accuracy : 0.74 % (ta = - 10 c to + 85 c) ? built-in high accuracy current detection amplifier : 5 % (at the input voltage difference of 100 mv) , 15 % (at the input voltage difference of 20 mv) ? output voltage setting resistor is open to enable prevention of invalidity current at ic standby. (i cc = 0 m a typ) ? oscillation frequency range : 100 khz to 500 khz ? built-in current detection amplifier with wide in-phase input voltage range : 0 v to v cc ? built-in soft-start function independent of loads ? built-in standby current function : 0 m a (typ) ? built-in totem-pole output stage supporting p-channel mos fets devices
mb39a113 3 n n n n pin assignment - inc2 outc2 + ine2 - ine2 cvm vref fb12 - ine1 + ine1 outc1 outd - inc1 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 + inc2 gnd cs vcc out vh ovp rt - ine3 fb3 ctl + inc1 (top view) (fpt-24p-m03)
mb39a113 4 n n n n pin description pin no. symbol i/o description 1 - inc2 i current detection amplifier (current amp2) inverted input terminal 2 outc2 o current detection amplifier (current amp2) output terminal 3 + ine2 i error amplifier (error amp2) non-inverted input terminal 4 - ine2 i error amplifier (error amp2) inverted input terminal 5cvm o open drain type output terminal of constant-voltage control state detection comparator (cv comp.) 6 vref o reference voltage output terminal 7 fb12 o error amplifier (error amp1, error amp2) output terminal 8 - ine1 i error amplifier (error amp1) inverted input terminal 9 + ine1 i error amplifier (error amp1) non-inverted input terminal 10 outc1 o current detection amplifier (current amp1) output terminal 11 outd o with ic in standby mode, this terminal is set to hi-z to prevent loss of current through output voltage setting resistance. ctl terminal : output l level at h level 12 - inc1 i current detection amplifier (current amp1) inverted input terminal 13 + inc1 i current detection amplifier (current amp1) non-inverted input terminal 14 ctl i power supply control terminal setting the ctl terminal at l level places the ic in the standby mode. 15 fb3 o error amplifier (error amp3) output terminal 16 - ine3 i error amplifier (error amp3) inverted input terminal 17 rt ? triangular wave oscillation frequency setting resistor connection terminal 18 ovp o open drain type output terminal of overvoltage detection comparator (ovcomp.) 19 vh o power supply terminal for fet drive circuit. (vh = vcc - 6 v) 20 out o external fet gate drive terminal. 21 vcc ? power supply terminal for reference power supply control circuit and output circuit 22 cs ? soft-start capacitor connection terminal 23 gnd ? ground terminal 24 + inc2 i current detection amplifier (current amp2) non-inverted input terminal
mb39a113 5 n n n n block diagram + - + - + - + - 20 + - 20 - + + - + - + + + + + - gnd vref rt - 2.5 v - inc2 (v o ) vcc - 6 v - 1.5 v 2.6 v 1.4 v 0.2 v drive 4.2 v vref 500 khz [ c t 45 pf 4.2 v bias vcc vref 5.0 v uvlo vref uvlo bias voltage vref vref 10 m a vh + inc1 - inc1 + inc2 outc1 outc2 - inc2 - ine1 + ine1 - ine2 + ine2 fb12 fb3 - ine3 cs outd cvm ovp vh out ctl vcc 8 10 13 12 9 4 2 24 1 3 7 16 11 15 22 5 18 21 20 19 14 17 6 23
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mb39a113 6 n n n n absolute maximum ratings * : the package are mounted on the dual-sided epoxy board (10 cm 10 cm) . warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. n n n n recommended operating conditions warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol conditions rating unit min max power supply voltage v cc vcc terminal ? 28 v output current i out ?? 60 ma peak output current i out duty 5 % (t = 1/fosc duty) ? 700 ma power dissipation p d ta + 25 c ? 740* mw storage temperature t stg ?- 55 + 125 c parameter sym- bol conditions value unit min typ max power supply voltage v cc vcc terminal 8 ? 25 v reference voltage output current i ref ?- 1 ? 0ma vh terminal output current i vh ? 0 ? 30 ma input voltage v ine - ine1 to - ine3, + ine1, + ine2 terminal 0 ? 5v v inc + inc1, + inc2, - inc1, - inc2 terminal 0 ? v cc v ctl terminal input voltage v ctl ? 0 ? 25 v output current i out ?- 45 ?+ 45 ma peak output current i out duty 5 % (t = 1/fosc duty) - 600 ?+ 600 ma cvm terminal output voltage v cvm ? 0 ? 25 v cvm terminal output current i cvm ? 0 ? 1ma ovp terminal output voltage v ovp ? 0 ? 25 v ovp terminal output current i ovp ? 0 ? 1ma outd terminal output voltage v outd ? 0 ? 17 v outd terminal output current i outd ? 0 ? 2ma oscillation frequency fosc ? 100 300 500 khz timing resistor r t ? 27 47 130 k w soft-start capacitor c s ?? 0.022 1.0 m f vh terminal capacitor c vh ?? 0.1 1.0 m f reference voltage output capacitor c ref ?? 0.1 1.0 m f operating ambient temperature ta ?- 30 + 25 + 85 c
mb39a113 7 n n n n electrical characteristics (vcc = 19 v, vref = 0 ma, ta = + 25 c) * : standard design value (continued) parameter sym- bol pin no. conditions value unit min typ max reference voltage block [ref] output voltage v ref1 6ta = + 25 c 4.975 5.000 5.025 v v ref2 6ta = - 10 c to + 85 c 4.963 5.000 5.037 v input stability line 6 vcc = 8 v to 25 v ? 310mv load stability load 6 vref = 0 ma to - 1 ma ? 110mv short-circuit output current ios 6 vref = 1 v - 50 - 25 - 12 ma under- voltage (vcc) lockout protection circuit block [uvlo] threshold voltage v tlh 6vref = 2.6 2.8 3.0 v v thl 6vref = 2.4 2.6 2.8 v hysteresis width v h 6 ?? 0.2* ? v soft-start block [soft] charge current i cs 22 ?- 14 - 10 - 6 m a triangular wave oscillator block [osc] oscillation frequency fosc 20 rt = 47 k w 270 300 330 khz frequency temperature stability d f/fdt 20 ta = - 30 c to + 85 c ? 1* ?% error amplifier block [error amp1, error amp2] input offset voltage v io 3, 4, 8, 9 fb12 = 2 v ? 15mv input bias current i b 3, 4, 8, 9 ?- 100 - 30 ? na voltage gain a v 7dc ? 100* ? db frequency bandwidth bw 7 av = 0 db ? 1.3* ? mhz output voltage v fbh 7 ? 4.8 5.0 ? v v fbl 7 ?? 0.8 0.9 v output source current i source 7 fb12 = 2 v ?- 120 - 60 m a output sink current i sink 7 fb12 = 2 v 2.0 4.0 ? ma
mb39a113 8 (vcc = 19 v, vref = 0 ma, ta = + 25 c) * : standard design value (continued) parameter sym- bol pin no. conditions value unit min typ max error amplifier block [error amp3] input current i ine 16 - ine3 = 0 v - 100 - 30 ? na voltage gain a v 15 dc ? 100* ? db frequency bandwidth bw 15 av = 0 db ? 1.3* ? mhz output voltage v fbh 15 ? 4.8 5.0 ? v v fbl 15 ?? 0.8 0.9 v output source current i source 15 fb3 = 2 v ?- 120 - 60 m a output sink current i sink 15 fb3 = 2 v 2.0 4.0 ? ma threshold voltage v th1 16 fb3 = 2 v, ta = + 25 c 4.179 4.200 4.221 v v th2 16 fb3 = 2 v, ta = - 10 c to + 85 c 4.169 4.200 4.231 v outd terminal output leak current i leak 11 outd = 17 v ? 01 m a outd terminal output on resistor r on 11 outd = 1 ma ? 35 50 w current detection amplifier block [current amp1, current amp2] input offset voltage v io 1, 12, 13, 24 + inc1 = + inc2 = - inc1 = - inc2 = 3 v to vcc - 3 ?+ 3mv input current i + inch 13, 24 + inc1 = + inc2 = 3 v to vcc, d v in = - 100 mv ? 20 30 m a i - inch 1, 12 + inc1 = + inc2 = 3 v to vcc, d v in = - 100 mv ? 0.1 0.2 m a i + incl 13, 24 + inc1 = + inc2 = 0 v, d v in = - 100 mv - 180 - 120 ?m a i - incl 1, 12 + inc1 = + inc2 = 0 v, d v in = - 100 mv - 195 - 130 ?m a current detection voltage v outc1 2, 10 + inc1 = + inc2 = 3 v to vcc, d v in = - 100 mv 1.9 2.0 2.1 v v outc2 2, 10 + inc1 = + inc2 = 3 v to vcc, d v in = - 20 mv 0.34 0.40 0.46 v v outc3 2, 10 + inc1 = + inc2 = 0 v, d v in = - 100 mv 1.8 2.0 2.2 v v outc4 2, 10 + inc1 = + inc2 = 0 v, d v in = - 20 mv 0.2 0.4 0.6 v in-phase input voltage range v cm 1, 12, 13, 24 ? 0 ? v cc v voltage gain a v 2, 10 + inc1 = + inc2 = 3 v to vcc, d v in = - 100 mv 19 20 21 v/v frequency bandwidth bw 2, 10 av = 0 db ? 2* ? mhz output voltage v outch 2, 10 ? 4.7 4.9 ? v v outcl 2, 10 ?? 20 200 mv output source current i source 2, 10 outc1 = outc2 = 2 v ?- 2 - 1ma output sink current i sink 2, 10 outc1 = outc2 = 2 v 150 300 ?m a
mb39a113 9 (continued) (vcc = 19 v, vref = 0 ma, ta = + 25 c) * : standard design value parameter sym- bol pin no. conditions value unit min typ max pwm comparator block [pwm comp.] threshold voltage v tl 7, 15 duty cycle = 0 % 1.4 1.5 ? v v th 7, 15 duty cycle = 100 %? 2.5 2.6 v output block [out] output source current i source 20 out = 13 v, duty 5 % (t = 1/fosc duty) ?- 400* ? ma output sink current i sink 20 out = 19 v, duty 5 % (t = 1/fosc duty) ? 400* ? ma output on resistor r oh 20 out = - 45 ma ? 6.5 9.8 w r ol 20 out = 45 ma ? 5.0 7.5 w rise time tr1 20 out = 3300 pf ? 50* ? ns fall time tf1 20 out = 3300 pf ? 50* ? ns ac adaptor detection block [uv comp.] threshold voltage v tlh 21 vcc = , - inc2 = 16.8 v 17.2 17.4 17.6 v v thl 21 vcc = , - inc2 = 16.8 v 16.8 17.0 17.2 v hysteresis width v h 21 ?? 0.4* ? v constant-voltage control state detection block [cv comp.] threshold voltage v tlh 5fb3 = 2.6 2.7 2.8 v v thl 5fb3 = 2.5 2.6 2.7 v hysteresis width v h 5 ?? 0.1* ? v cvm terminal output leakage current i leak 5cvm = 25 v ? 01 m a cvm terminal output on resistor r on 5cvm = 1 ma ? 200 400 w overvoltage detection block [ov comp.] threshold voltage v tlh 18 fb3 = 1.3 1.4 1.5 v v thl 18 fb3 = 1.2 1.3 1.4 v hysteresis width v h 18 ?? 0.1* ? v ovp terminal output leak current i leak 18 ovp = 25 v ? 01 m a ovp terminal output on resistor r on 18 ovp = 1 ma ? 200 400 w control block [ctl] ctl input voltage v on 14 ic operation mode 2 ? 25 v v off 14 ic standby mode 0 ? 0.8 v input current i ctlh 14 ctl = 5 v ? 100 150 m a i ctll 14 ctl = 0 v ? 01 m a bias voltage block [vh] output voltage v h 19 vcc = 8 v to 25 v, vh = 0 ma to 30 ma v cc - 6.5 v cc - 6.0 v cc - 5.5 v general standby current i ccs 21 ctl = 0 v ? 010 m a power supply current i cc 21 ctl = 5 v ? 57.5ma
mb39a113 10 n n n n typical characteristics (continued) ta = + 25 c ctl = 5 v 6 5 4 3 2 1 0 0 5 10 15 20 25 1000 900 800 700 600 500 400 300 200 100 0 10 9 8 7 6 5 4 3 2 1 0 5 015 10 25 ta = + 25 c vcc = 19 v vref = 0 ma 20 v ref i ctl 6 5 4 3 2 1 0 5 015 10 25 20 ta = + 25 c ctl = 5 v vref = 0 ma 6 5 4 3 2 1 0 5 015 10 25 30 35 20 ta = + 25 c vcc = 19 v ctl = 5 v 5.08 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 vcc = 19 v ctl = 5 v vref = 0 ma - 20 - 40 20 060 40 100 80 340 330 320 310 300 290 280 270 260 ta = + 25 c ctl = 5 v rt = 47 k w 5 015 10 25 20 power supply current i cc (ma) power supply voltage v cc (v) power supply current vs. power supply voltage ctl terminal input current i ctl ( m a) ctl terminal input voltage v ctl (v) ctl terminal input current, reference voltage vs. ctl terminal input voltage reference voltage v ref (v) power supply voltage v cc (v) reference voltage vs. power supply voltage reference voltage v ref (v) load current i ref (ma) reference voltage vs. load current reference voltage v ref (v) operating ambient temperature ta ( c) reference voltage vs. operating ambient temperature reference voltage v ref (v) triangular wave oscillation frequency fosc (khz) power supply voltage v cc (v) triangular wave oscillation frequency vs. power supply voltage
mb39a113 11 (continued) vcc = 19 v ctl = 5 v rt = 47 k w - 20 - 40 20 060 40 100 80 340 330 320 310 300 290 280 270 260 ta = + 25 c vcc = 19 v ctl = 5 v 1000 100 10 10 100 1000 4.25 4.24 4.23 4.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 vcc = 19 v ctl = 5 v - 20 - 40 20 060 40 100 80 operating ambient temperature ta ( c) triangular wave oscillation frequency vs. operating ambient temperature triangular wave oscillation frequency fosc (khz) timing resistor r t (k w ) triangular wave oscillation frequency vs. timing resistor triangular wave oscillation frequency fosc (khz) error amplifier threshold voltage vs. operating ambient temperature error amplifier threshold voltage vth (v) operating ambient temperature ta ( c)
mb39a113 12 (continued) ta = + 25 c vcc = 19 v 40 30 20 10 0 - 10 - 20 - 30 - 40 180 90 0 - 90 - 180 a v 1 k 10 k 100 k 100 1 m 10 m j - + + + 7 8 9 error amp1 (error amp2) (4) (3) in cs out 10 k w 10 k w 2.4 k w 240 k w 1 m f ta = + 25 c vcc = 19 v 40 30 20 10 0 - 10 - 20 - 30 - 40 180 90 0 - 90 - 180 a v 1 k 10 k 100 k 100 1 m 10 m j - + + + 15 16 error amp3 in cs out 10 k w 10 k w 2.4 k w 4.2 v 240 k w 1 m f a v j 40 30 20 10 0 - 10 - 20 - 30 - 40 180 90 0 - 90 - 180 1 k 10 k 100 k 100 1 m 10 m + - + 10 13 12 (2) (24) (1) current amp1 (current amp2) vcc = 19 v in 12.6 v out 10 k w 10 k w 1 m f gain a v (db) frequency f (hz) error amplifier, gain and phase vs. frequency phase j (deg) gain a v (db) frequency f (hz) error amplifier, gain and phase vs. frequency phase j (deg) gain a v (db) frequency f (hz) current detection amplifier, gain and phase vs. frequency phase j (deg)
mb39a113 13 (continued) 800 700 600 500 400 300 200 100 0 740 - 20 - 40 20 060 40 100 80 power dissipation p d (mw) operating ambient temperature ta ( c) power dissipation vs. operating ambient temperature
mb39a113 14 n n n n functional description 1. dc/dc converter block (1) reference voltage block (ref) the reference voltage circuit generates a temperature-compensated reference voltage (5.0 v typ) using the voltage supplied from the vcc terminal (pin 21) . the voltage is used as the reference voltage for the ics internal circuit. the reference voltage can be used to supply a load current of up to 1 ma to an external device through the vref terminal (pin 6) . (2) triangular wave oscillator block (osc) the triangular wave oscillator block has built-in a frequency setting capacitor, and generates the triangular wave oscillation waveforms by connecting the frequency setting resistor with the rt terminal (pin 17) . the triangular wave is input to the ics internal pwm comparator. (3) error amplifier block (error amp1) the error amplifier (error amp1) detects voltage drop of the ac adaptor and a pwm control signal is output. by connecting a feedback resistor and capacitor between fb12 terminal (pin 7) and - ine1 terminal (pin 8) , it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the cs terminal (pin 22) . the use of error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load. (4) error amplifier block (error amp2) the error amplifier detects output signal of current detection amplifier (current amp2) and outputs pwm control signal by comparison with + ine2 terminal (pin 3) , also controls charge current. by connecting a feedback resistor and capacitor between fb12 terminal (pin 7) and - ine2 terminal (pin 4) , it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the cs terminal (pin 22) . the use of error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load. (5) error amplifier block (error amp3) the error amplifier (error amp3) detects the dc/dc converter output voltage and outputs pwm control signals. an arbitrary output voltage can be set for 1 to 4 cells by connecting external output voltage setting resistors to the error amplifier inverting input pins. by connecting a feedback resistor and capacitor between fb3 terminal (pin15) and - ine3 terminal (pin 16) , it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the cs terminal (pin 22) . the use of error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load.
mb39a113 15 (6) current detection amplifier block (current amp1) the current detection amplifier (current amp1) detects voltage drop which occurs between both ends of the output sense resistor (r s ) due to the flow of the charge current, using the + inc1 terminal (pin 13) and - inc1 terminal (pin 12) . then it outputs the signal amplifier by 20 times to the error amplifier (error amp1) at the next stage. (7) current detection amplifier block (current amp2) the current detection amplifier (current amp2) detects voltage drop which occurs between both ends of the output sense resistor (r s ) due to the flow of the charge current, using the + inc2 terminal (pin 24) and - inc2 terminal (pin 1) . then it outputs the signal amplified by 20 times to the error amplifier (error amp2) at the next stage. (8) pwm comparator block (pwm comp.) the pwm comparator circuit is a voltage-to-pulse width modulator that controls the output duty depending on the output voltage of error amplifier (error amp1 to error amp3) . the pwm comparator circuit compares the triangular wave generated by the triangular wave oscillator to the error amplifier output voltage and turns on the external output transistor during the interval in which the triangular wave voltage is lower than the error amplifier output voltage. (9) output block (out) the output circuit uses a totem-pole configuration capable of driving an external p-channel mos fet. the output l level sets the output amplitude to 6 v (typ) using the voltage generated by the bias voltage block (vh) . this results in increasing conversion efficiency and suppressing the withstand voltage of the connected external transistor in a wide range of input voltages. (10) power supply control block (ctl) setting the ctl terminal (pin 14) low places the ic in the standby mode. (the supply current is 10 m a at maximum in the standby mode.) ctl function table (11) bias voltage block (vh) the bias voltage circuit outputs v cc - 6 v (typ) as the minimum potential of the output circuit. in the standby mode, this circuit outputs the potential equal to vcc. ctl power l off (standby) hon (active)
mb39a113 16 2. protection functions (1) under-voltage lockout protection circuit (uvlo) the transient state of when the power supply (vcc) is turned on or a momentary decrease in supply voltage/ internal reference voltage (vref) may cause malfunctions in the control ic, resulting in breakdown or degra- dation of the system. to prevent such malfunctions, the under-voltage lockout protection circuit detects an internal reference voltage drop and fixes out terminal (pin 20) to h level. the system restores when the internal reference voltage reaches the threshold voltage of the under-voltage lockout protection circuit. protection circuit (uvlo) operation function table at uvlo operating (vref voltage is lower than uvlo threshold voltage.) (2) ac adapter detection block (uv comp.) this block detects that power-supply voltage (vcc) is lower than the battery voltage + 0.2 v (typ) , and the out terminal (pin 18) fixed at the h level. the system restores voltage supply when the supply voltage reaches the threshold voltage of the ac adapter detection block. protection circuit (uv comp.) operation function table at uv comp. operating (vcc voltage is lower than uv comp. threshold voltage.) 3. soft-start function soft-start block (soft) connecting a capacitor to the cs terminal (pin 22) prevents rush currents from flowing upon activation of the power supply. using the error amplifier to detect a soft-start allows to soft-start at constant setting time intervals independent of the output load of the dc/dc converter. 4. detection function (1) constant-voltage control state detection block (cv comp.) error amplifier (error amp3) detects the voltage at fb3 (pin 15) falling to or below 2.6 v (typ) and outputs l level to the constant-voltage control state detection block output terminal (cvm, pin 5). (2) overvoltage detection block (ov comp.) error amplifier (error amp3) detects the voltage at fb3 (pin 15) falling to or below 1.3 v (typ) and outputs h level to the overvoltage detection block output terminal (ovp, pin 18). outd out cs cvm ovp hi-z h l h h outd out cs lhl
mb39a113 17 n n n n setting the charging voltage the charge voltage (dc/dc output voltage) can be set by connecting an external output voltage setting resistors (r3, r4) to the - ine3 terminal (pin 16) . select a resistor value at which the on-resistor (35 w at 1 ma) of the built-in fet connected to the outd terminal (pin 11) can be ignored. n n n n setting the charging current the charge current value (output limit current) can be set depending on the voltage value at the + ine2 terminal (pin 3) . if a current exceeding the set current value attempts to flow, the charge voltage drops according to the set current value. battery charge current setting voltage : + ine2 + ine2 (v) = 20 i1 (a) r s ( w ) n n n n setting the triangular wave oscillation frequency the triangular wave oscillation frequency is determined by the timing resistor (r t ) connected to the rt terminal (pin 17) . triangular wave oscillation frequency : fosc fosc (khz) : = 14100/r t (k w ) charge voltage of battery : v o v o (v) = (r3 + r4) /r4 4.2 (v) - + + 11 16 22 outd - ine3 cs b v o 4.2 v r3 r4
mb39a113 18 n n n n setting of soft-start time (1) setting constant voltage mode soft-start to prevent rush currents when the ic is turned on, the ic allows soft-start using the capacitor (c s ) connected to the cs terminal (pin 22) . when the ctl terminal (pin 14) is placed under h level and ic is activated (threshold voltage of v cc 3 uvlo) , and q2 is turned off and the external soft-start capacitor (c s ) connected to the cs terminal is charged at 10 m a. the error amp output potential (fb3 terminal (pin 15)) is determined through comparison between either of the lower potentials at two non-inverting input terminals (internal reference voltage (4.2 v typ) , cs terminal voltage), and the inverting input terminal voltage ( - ine3 terminal (pin 16)) . within the soft-start period (cs terminal voltage < 4.2 v) , fb3 is determined by comparison between - ine3 terminal voltage and cs terminal voltage, and dc/dc converter output voltage goes up proportionately with the increase of cs terminal voltage caused by charging on the soft-start capacitor. the soft-start time is obtained from the following formula. soft-start circuit soft-start time : ts (time until output voltage 100 % ) ts (s) : = 0.42 c s ( m f) cs terminal voltage error amp block internal reference voltage soft-start time : ts : = 4.9 v : = 4.2 v : = 0 v - + + 15 22 fb3 16 - ine3 cs c s error amp3 4.2 v q2 uvlo vref 10 m a 10 m a
mb39a113 19 (2) setting constant current mode soft-start to prevent rush currents when the ic is turned on, the ic allows soft-start using the capacitor (c s ) connected to the cs terminal (pin 22) . when the ctl terminal (pin 14) is placed under h level and ic is activated (threshold voltage of vref 3 uvlo) , and q2 is turned off and the external soft-start capacitor (c s ) connected to the cs terminal is charged at 10 m a. the error amp1 output potential (fb12 terminal (pin 7) ) is determined through comparison between either of the lower potentials at two non-inverting input terminals ( + ine1 terminal (pin 9) voltage and cs terminal voltage), and the inverting input terminal voltage ( - ine1 terminal (pin 8) ) . within the soft-start period (cs terminal voltage < + ine1) , fb12 is determined by comparison between - ine1 terminal voltage and cs terminal voltage, and dc/dc converter output voltage goes up proportionately with the increase of cs terminal voltage caused by charging on the soft-start capacitor. the error amp1 output potential (fb12 terminal (pin 7) ) is determined through comparison between either of the potentials at two non-inverting input terminals ( + ine2 terminal (pin 3) ) voltage and cs terminal voltage), and the inverting input terminal voltage ( - ine2 terminal (pin 4) ) . within the soft-start period (cs terminal voltage < + ine2) , fb12 is determined by comparison between - ine2 terminal voltage and cs terminal voltage, and dc/dc converter output voltage goes up proportionately with the increase of cs terminal voltage caused by charging on the soft-start capacitor. the soft-start time is obtained from the following formula. soft-start time : ts (time until output voltage 100 % ) ts (s) : = + ine1 ( + ine2) /10 m a c s ( m f) cs terminal voltage error amp1 block comparison voltage with - ine1 voltage (error amp2 block comparison voltage with - ine2 voltage) soft-start time : ts : = 4.9 v + ine1 ( + ine2) : = 0 v
mb39a113 20 soft-start circuit - + + 7 22 fb12 4 - ine1 - ine2 + ine1 + ine2 cs c s error amp1 (error amp2) q2 uvlo vref 10 m a 10 m a 8 9 3
mb39a113 21 n n n n setting the dynamically-controlled charging with an external resistor connected to + ine1(pin 9), the ic enters the dynamically-controlled charging mode to reduce the charge current to keep ac adapter power constant when the partial potential point a of the ac adapter voltage (vcc) become lower the - ine2 terminal voltage. n n n n about constant-voltage control state detection/overvoltage detection timing chart in the constant-voltage control state, the cvm terminal (pin 5) of the constant-voltage control state detection block (cv comp.) outputs l level, when the voltage at the fb3 terminal (pin 15) of the error amplifier (erroramp 3) becomes 2.6 v (typ) or less. when the dc/dc converter output voltage enters the state of the over-voltage higher than a setting voltage, the voltage at fb3 terminal (pin 15) of the error amplifier (error amp3) becomes 1.3 v (typ) or less. as a result, the ovp terminal (pin 18) of the overvoltage detection block (ov comp.) outputs h level. both the cvm terminal and the ovp terminal are open-drain output forms : dynamically-controlled charging setting voltage : vth vth (v) = (r1 + r2) /r2 - ine1 - + 8 9 + ine1 - ine1 a r1 vcc r2 error amp3 fb3 error amp2 error amp1 fb12 cv comp. cvm 2.6 v cv comp. v thl 2.5 v 1.3 v ov comp. v thl 1.5 v ov comp. ovp out constant current control constant voltage control overvoltage state
mb39a113 22 n n n n about the operation timing chart error amp3 fb3 current amp2 outc2 error amp2 error amp1 fb12 2.5v 1.5 v out constant voltage control ac adaptor dynamically- controlled charging constant current control
mb39a113 23 n n n n processing without using of the current amp1 and amp2 when current amp is not used, connect the + inc1 terminal (pin 13), + inc2 terminal (pin 24), - inc1 terminal (pin 12), and - inc2 terminal (pin 1) to vref, and open the outc1 terminal (pin 10) and outc2 terminal (pin 2). n n n n processing without using of the error amp1 and amp2 when error amp is not used, leave the fb12 terminal (pin 7) open and connect the - ine1 terminal (pin 8) and - ine2 terminal (pin 4) to gnd, and connect + ine1 terminal (pin 9) and + ine2 terminal (pin 3) to vref. 24 + inc2 + inc1 - inc2 outc1 outc2 vref - inc1 12 1 10 2 6 13 open connection when current amp is not used 23 + ine2 + ine1 - ine2 vref fb12 gnd - ine1 9 4 8 3 7 6 open connection when error amp is not used
mb39a113 24 n n n n processing without using of the cs terminal when soft-start function is not used, leave the cs terminal (pin 22) open. 22 cs open when no soft-start function is specified
mb39a113 25 n n n n i/o equivalent circuit (continued) + - 21 23 vcc gnd 6 vref 22 cs + - 17 rt 14 ctl 3 fb12 + ine2 4 - ine2 13 + inc1 12 10 - inc1 outc1 37.8 k w 12.35 k w 33.1 k w 51 k w gnd vref (5.0 v) gnd vref (5.0 v) vcc gnd vref (5.0 v) gnd vcc gnd vcc cs 7 9 fb12 + ine1 8 - ine1 gnd vcc cs 1.3 v fb3 15 16 - ine3 vref (5.0 v) gnd vcc 4.2 v cs 24 + inc2 1 2 - inc2 outc2 gnd vcc reference voltage block esd protection element control block soft-start block triangular wave oscillator block error amplifier block (error amp1) error amplifier block (error amp2) error amplifier block (error amp3) current detection amplifier block (current amp1) current detection amplifier block (current amp2) esd protection element
mb39a113 26 (continued) vcc gnd vh 20 out 5 cvm vcc fb3 vref (5.0 v) gnd 18 ovp vcc fb3 vref (5.0 v) gnd 11 outd gnd 19 vh vcc gnd c t gnd vcc fb12 fb3 vcc gnd - inc2 vref (5.0 v) pwm comparator block output block ac adaptor detection block constant-voltage control state detection block overvoltage detection block bias voltage block prevent inefficient current block
mb39a113 27 n n n n apprication example a b a b + d2 r4 180 k w vin (8 v to 25 v) r5 330 k w r6 30 k w r10 120 k w c8 10000 pf r11 30 k w r9 10 k w r12 30 k w r16 200 k w r13 20 k w q2 sw r14 1 k w r15 120 w r19 100 k w r17 100 k w r3 330 k w r18 200 k w r8 100 k w r7 22 k w c10 4700 pf c6 1500 pf c11 0.022 m f r2 47 k w c9 0.1 m f c12 0.1 m f c7 0.1 m f c1 4.7 m f c2 4.7 m f c3 22 m f c4 4.7 m f q1 l1 15 m h d1 q3 battery v o i1 r1 0.033 w r27 100 k w - + + - + - + - 20 + - 20 - + + - + - + + + + + - gnd vref rt - 2.5 v - inc2 (v o ) vcc - 6 v - 1.5 v 2.6 v 1.4 v 0.2 v drive 4.2 v vref 500 khz [ c t 45 pf 4.2 v bias vcc vref 5.0 v uvlo vref uvlo bias voltage vref vref 10 m a vh + inc1 - inc1 + inc2 outc1 outc2 - inc2 - ine1 + ine1 - ine2 + ine2 fb12 fb3 - ine3 cs outd cvm ovp vh out ctl vcc 8 10 13 12 9 4 2 24 1 3 7 16 11 15 22 5 18 21 20 19 14 17 6 23
]
mb39a113 28 n n n n parts list note : nec : nec corporation sanyo : sanyo electric co., ltd rohm : rohm co., ltd. sumida : sumida corporation tdk : tdk corporation koa : koa corporation ssm : susumu co., ltd os-con is a trademark of sanyo electric co., ltd. component item specification vendor parts no. q1, q3 q2 pch fet nch fet vds = - 30 v, id = - 7.0 a vds = 30 v, id = 1.4 a nec sanyo m pa2714gr mch3401 d1, d2 diode vf = 0.42 v (max) , at if = 3 a rohm rb053l-30 l1 inductor 15 m h 3.6 a, 50 m w sumida cdrh104r-150 c1, c2, c4 c3 c6 c7, c9 c8 c10 c11 c12 ceramics condenser os-con tm ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser 4.7 m f 22 m f 1500 pf 0.1 m f 0.01 m f 4700 pf 0.022 m f 0.1 m f 25 v 20 v 50 v 50 v 50 v 50 v 50 v 50 v tdk sanyo tdk tdk tdk tdk tdk tdk c3225jb1e475k 20svp22m c1608jb1h152k c1608jb1h104k c1608jb1h103k c1608jb1h472k c1608jb1h223k c1608jb1h104k r1 r2 r3, r5 r4 r6 r7 r8 r9 r10 r11, r12 r13 r14 r15 r16, r18 r17, r19 r27 resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor 33 m w 47 k w 330 k w 180 k w 30 k w 22 k w 100 k w 10 k w 120 k w 30 k w 20 k w 1 k w 120 w 200 k w 100 k w 100 k w 1 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % koa ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm sl1tte33lof rr0816p-473-d rr0816p-334-d rr0816p-184-d rr0816p-303-d rr0816p-223-d rr0816p-104-d rr0816p-103-d rr0816p-124-d rr0816p-303-d rr0816p-203-d rr0816p-102-d rr0816p-121-d rr0816p-204-d rr0816p-104-d rr0816p-104-d
mb39a113 29 n n n n selection of components pch mos fet the p-channel mosfet for switching use should be rated for at least + 20 % more than the input voltage. to minimize continuity loss, use a fet with low r ds (on) between the drain and source. for high input voltage and high frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. in this application, the m pa2714gr (nec products) is used. continuity loss, on/off switching loss and total loss are determined by the following formulas. the selection must ensure that peak drain current does not exceed rated values. example) using the m pa2714gr setting 16.8 v input voltage v in = 25 v, output voltage v o = 16.8 v, drain current i d = 3 a, oscillation frequency fosc = 300 khz, l = 15 m h, drain-source on resistance r ds ( on ) : = 18 m w , tr : = 15 ns, tf : = 42 ns continuity loss : pc p c = i d 2 r ds ( on ) duty on-cycle switching loss : p s ( on ) p s ( on ) = v d ( max ) i d tr fosc 6 off-cycle switching loss : p s ( off ) p s ( off ) = v d ( max ) i d ( max ) tf fosc 6 total loss : p t p t = p c + p s ( on ) + p s ( off ) drain current (max) : i d ( max ) i d ( max ) = io + v in - vo t on 2l = 3 + 25 - 16.8 1 0.672 2 15 10 - 6 300 10 3 : = 3.6 a drain current (min) : i d ( min ) i d ( min ) = io - v in - vo t on 2l = 3 - 25 - 16.8 1 0.672 2 15 10 - 6 300 10 3 : = 2.4 a p c = i d 2 r ds ( on ) duty = 3 2 0.018 0.672 : = 0.109 w
mb39a113 30 the above power dissipation figures for the m pa2714gr are satisfied with ample margin at 2.0 w. setting 12.6 v input voltage v in = 22 v, output voltage v o = 12.6 v, drain current i d = 3 a, oscillation frequency fosc = 300 khz, l = 15 m h, drain-source on resistance r ds ( on ) : = 18 m w , tr : = 15 ns, tf : = 42 ns p s ( on ) = v d i d tr fosc 6 = 25 3 15 10 - 9 300 10 3 6 : = 0.056 w p s ( off ) = v d i d ( max ) tf fosc 6 = 25 3.6 42 10 - 9 300 10 3 6 : = 0.189 w p t = pc + p s ( on ) + p s ( off ) : =0.109 + 0.056 + 0.189 : =0.354 w drain current (max) : i d ( max ) i d ( max ) = io + v in - vo t on 2l = 3 + 22 - 12.6 1 0.572 2 15 10 - 6 300 10 3 : = 3.6 a drain current (min) : i d ( min ) i d ( min ) = io - v in - vo t on 2l = 3 - 22 - 12.6 1 0.572 2 15 10 - 6 300 10 3 : = 2.4 a p c = i d 2 r ds ( on ) duty = 3 2 0.018 0.572 : = 0.093 w
mb39a113 31 the above power dissipation figures for the m pa2714gr are satisfied with ample margin at 2.0 w. inductor in selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. this can be prevented by choosing a higher inductance value, which will enable continuous operation under light-load. note that if the inductance value is too high, however, direct current resistance (dcr) is increased and this will also reduce efficiency. the inductance must be set at the point where efficiency is greatest. note also that the dc superimposition characteristic becomes worse as the load current value approaches the rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing loss of efficiency. the selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current. inductance values are determined by the following formulas. the l value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the load current or less. 16.8 v output example) p s ( on ) = v d i d tr fosc 6 = 22 3 15 10 - 9 300 10 3 6 : = 0.050 w p s ( off ) = v d i d ( max ) tf fosc 6 = 22 3.6 42 10 - 9 300 10 3 6 : = 0.166 w p t = pc + p s ( on ) + p s ( off ) : = 0.093 + 0.050 + 0.166 : =0.309 w inductance value : l l 3 2 (v in - vo) t on io l 3 2 (v in ( max ) - vo) t on io 3 2 (25 - 16.8) 1 0.672 3 300 10 3 3 12.2 m h
mb39a113 32 12.6 v output example) inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current, but at which continuous operation is not possible at light-loads. so, it is necessary to determine the load level at which continuous operation becomes possible. in this application, the sumida cdrh104r-150 is used. the following equation is available to obtain the load current as a continuous current condition when 15 m h is used. example) using the cdrh104r-150 15 m h (tolerance 30 % ) , rated current = 3.6 a 16.8 v output 12.6 v output to determine whether the current through the inductor is within rated values, it is necessary to determine the peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output ripple voltage. the peak value and peak-to-peak value of the ripple current can be determined by the following formulas. l 3 2 (v in ( max ) - vo) t on io 3 2 (22 - 12.6) 1 0.572 3 300 10 3 3 12.0 m h the load current value under continuous operating conditions : io io 3 vo t off 2l io 3 vo t off 2l 3 16.8 1 (1 - 0.672) 2 15 10 - 6 300 10 3 3 0.61 a io 3 vo t off 2l 3 12.6 1 (1 - 0.572) 2 15 10 - 6 300 10 3 3 0.60 a peak value : i l i l 3 io + v in - vo t on 2l peak-peak value : d i l d i l = v in - vo t on l
mb39a113 33 example) using the cdrh104r-150 15 m h (tolerance 30 % ) , rated current = 3.6 a peak value 16.8 v output 12.6 v output peak-peak value 16.8 v output 12.6 v output flyback diode as a flyback diode, in general, a schottky barrier diode (sbd) is used when the reverse voltage to the diode is 40 v or less. the sbd has the characteristic of higher speed in terms of faster reverse recovery time, and lower forward voltage, and is ideal for archiving high efficiency. there is no problem as long as the dc reverse voltage is sufficiently higher than the input voltage, and the mean current flowing during the diode conduction time is within the mean output current level, and as the peak current is within the peak surge current limits. in this application the rb053l-30 (rohm) are used. the diode mean current and diode peak current can be obtained by the following formulas. i l 3 io + v in - vo t on 2l 3 3 + 25 - 16.8 1 0.672 2 15 10 - 6 300 10 3 3 3.6 a i l 3 io + v in - vo t on 2l 3 3 + 22 - 12.6 1 0.572 2 15 10 - 6 300 10 3 3 3.6 a d i l = v in - vo t on l = 25 - 16.8 1 0.672 15 10 - 6 300 10 3 : = 1.22 a d i l = v in - vo t on l = 22 - 12.6 1 0.572 15 10 - 6 300 10 3 : =1.2 a diode mean current : i di i di 3 io (1 - vo ) v in diode peak current : i dip i dip 3 (io + vo t off ) 2l
mb39a113 34 example) using the rb053l-30 vr (dc reverse voltage) = 30 v, average output current = 3.0 a, peak surge current = 70 a vf (forward voltage) = 0.42 v, at if = 3.0 a 16.8 v output 12.6 v output 16.8 v output 12.6 v output smoothing capacitor the smoothing capacitor is an indispensable element for reducing ripple voltage in output. in selecting a smooth- ing capacitor, it is essential to consider equivalent series resistance (esr) and allowable ripple current. higher esr means higher ripple voltage, so that to reduce ripple voltage it is necessary to select a capacitor with low esr. note, however, that the use of a capacitor with low esr has substantial effects on loop phase character- istics, and impairing system stability. care should also be taken to use a capacity with sufficient margin for allowable ripple current. in this application the 20svp22m (os-con tm : sanyo) are used. the esr, capacitance value, and ripple current can be obtained by the following formulas. i di 3 io (1 - vo ) v in 3 3 (1 - 0.672) 3 0.984 a i di 3 io (1 - vo ) v in 3 3 (1 - 0.572) 3 1.284 a i dip 3 (io + vo t off ) 2l 3 3.6 a i dip 3 (io + vo t off ) 2l 3 3.6 a equivalent series resistance : esr esr d vo - 1 d i l 2 p fc l capacitance value : c l c l 3 d i l 2 p f ( d vo -d i l esr) ripple current : ic l rms ic l rms 3 (v in - vo) t on 2 ? 3l
mb39a113 35 example) using the 20svp22m rated voltage = 20 v, esr = 60 m w , maximum allowable ripple current = 1450 marms equivalent series resistance 16.8 v output 12.6 v output capacitance value 16.8 v output 12.6 v output ripple current 16.8 v output 12.6 v output esr d vo - 1 d i l 2 p fc l 0.168 - 1 1.22 2 p 300 10 3 22 10 - 6 114 m w esr d vo - 1 d i l 2 p fc l 0.126 - 1 1.2 2 p 300 10 3 22 10 - 6 80 m w c l 3 d i l 2 p f ( d vo -d i l esr) 3 1.22 2 p 300 10 3 (0.168 - 1.22 0.06) 3 6.8 m f c l 3 d i l 2 p f ( d vo -d i l esr) 3 1.2 2 p 300 10 3 (0.126 - 1.2 0.06) 3 11.8 m f ic l rms 3 (v in - vo) t on 2 ? 3l 3 (25 - 16.8) 0.672 2 ? 3 15 10 - 6 300 10 3 3 707 marms ic l rms 3 (v in - vo) t on 2 ? 3l 3 (22 - 12.6) 0.572 2 ? 3 15 10 - 6 300 10 3 3 690 marms
mb39a113 36 n n n n reference data (continued) 0.01 0.1 1 10 100 98 96 94 92 90 88 86 84 82 80 02 468101214 100 98 96 94 92 90 88 86 84 82 80 18 16 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 d.c.c. mode dead battery mode d.c.c. mode : dynamically-controlled charging conversion efficiency vs. charge current (constant voltage mode) conversion efficiency vs. charge voltage (constant current mode) ta = + 25 c vac = 19 v v batt = 12.6 v setting h = ( v batt i batt ) / ( vac iac ) converted to v batt ta = + 25 c vac = 19 v i batt = 3 a setting h = ( v batt i batt ) / ( vac iac ) converted to v batt i batt (a) efficiency h (%) v batt (v) efficiency h ( % ) batt voltage vs. batt charge current (12.6 v setting) ta = + 25 c vac = 19 v v batt = 12.6 v setting i batt (a) v batt (v)
mb39a113 37 (continued) 0.01 0.1 1 10 100 98 96 94 92 90 88 86 84 82 80 0246810121416 100 98 96 94 92 90 88 86 84 82 80 18 16 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 d.c.c. mode dead battery mode d.c.c. mode : dynamically-controlled charging conversion efficiency vs. charge current (constant voltage mode) conversion efficiency vs. charge voltage (constant current mode) ta = + 25 c vac = 19 v v batt = 16.8 v setting h = ( v batt i batt ) / ( vac iac ) converted to v batt ta = + 25 c vac = 19 v i batt = 3 a setting h = ( v batt i batt ) / ( vac iac ) converted to v batt i batt (a) efficiency h ( % ) i batt (a) v batt (v) v batt (v) efficiency h ( % ) batt voltage vs. batt charge current (16.8 v setting) ta = + 25 c vac = 19 v v batt = 16.8 v setting
mb39a113 38 (continued) vd(v) 20 15 10 5 0 out(v) 15 10 5 0 012345678910( m s) vac = 19 v cv mode i batt = 1.5 a v batt = 12.6 v setting vd(v) 20 15 10 5 0 out(v) 15 10 5 0 012345678910( m s) vac = 19 v cc mode i batt = 3 a setting v batt = 10 v switching waveform at constant voltage mode (12.6 v setting) switching waveform at constant current mode (12.6 v setting at 10 v)
mb39a113 39 (continued) switching waveform at constant voltage mode (16.8 v setting) switching waveform at constant current mode (16.8 v setting at 10 v) vd(v) 20 15 10 5 0 out(v) 15 10 5 0 012345678910( m s) vac = 19 v cv mode i batt = 1.5 a v batt = 16.8 v setting vd(v) 20 15 10 5 0 out(v) 15 10 5 0 012345678910( m s) vac = 19 v cc mode i batt = 3 a setting v batt = 10 v
mb39a113 40 (continued) ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 12.6 v setting ovp cvm ctl ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 12.6 v setting v o ctl soft-start operating waveform at constant voltage mode (12.6 v setting) (1) soft-start operating waveform at constant voltage mode (12.6 v setting) (2)
mb39a113 41 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 12.6 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 12.6 v setting ovp cvm ctl discharge operating waveform at constant voltage mode (12.6 v setting) (1) discharge operating waveform at constant voltage mode (12.6 v setting) (2)
mb39a113 42 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 12.6 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 12.6 v setting ovp cvm ctl soft-start operating waveform at constant current mode (12.6 v setting) (1) soft-start operating waveform at constant current mode (12.6 v setting) (2)
mb39a113 43 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 12.6 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 12.6 v setting ovp cvm ctl discharge operating waveform at constant current mode ( 12.6 v setting ) ( 1 ) discharge operating waveform at constant current mode ( 12.6 v setting ) ( 2 )
mb39a113 44 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 16.8 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 16.8 v setting ovp cvm ctl soft-start operating waveform at constant voltage mode (16.8 v setting) (1) soft-start operating waveform at constant voltage mode (16.8 v setting) (2)
mb39a113 45 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 16.8 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cv mode rl = 20 w v batt = 16.8 v setting ovp cvm ctl discharge operating waveform at constant voltage mode ( 16.8 v setting ) ( 1 ) discharge operating waveform at constant voltage mode ( 16.8 v setting ) ( 2 )
mb39a113 46 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 16.8 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 16.8 v setting ovp cvm ctl soft-start operating waveform at constant current mode (16.8 v setting) (1) soft-start operating waveform at constant current mode ( 16.8 v setting ) (2)
mb39a113 47 (continued) ctl(v) v o (v) 5 0 20 15 10 5 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 16.8 v setting ctl v o ctl(v) cvm(v) 5 0 ovp(v) 5 0 6 4 2 0 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0 (ms) vac = 19 v cc mode rl = 3.33 w v batt = 16.8 v setting ovp cvm ctl discharge operating waveform at constant current mode ( 16.8 v setting ) ( 1 ) discharge operating waveform at constant current mode ( 16.8 v setting ) ( 2 )
mb39a113 48 n n n n notes on use ? take account of common impedance when designing the earth line on a printed wiring board. ? take measures against static electricity. for semiconductors, use antistatic or conductive containers. when storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. the work table, tools, and measuring instruments must be grounded. the worker must put on a grounding device containing 250 k w to 1 m w resistors in series. ? do not apply a negative voltage. applying a negative voltage of - 0.3 v or less to an lsi may generate a parasitic transistor, resulting in malfunction.
mb39a113 49 n n n n ordering information part number package remarks MB39A113PFV 24-pin plastic ssop (fpt-24p-m03)
mb39a113 50 n n n n package dimension 24-pin plastic ssop (fpt-24p-m03) note 1) *1 : resin protrusion. (each side : + 0.15 (.006) max) . note 2) *2 : these dimensions do not include resin protrusion. note 3) pins width and pins thickness include plating thickness. note 4) pins width do not include tie bar cutting remainder. dimensions in mm (inches) . note : the values in parentheses are reference values. c 2003 fujitsu limited f24018s-c-4-5 7.750.10(.305.004) 5.600.10 7.600.20 (.220.004) (.299.008) * 1 * 2 0.10(.004) 112 13 24 0.65(.026) C0.07 +0.08 0.24 .009 +.003 C.003 m 0.13(.005) index 0.170.03 (.007.001) "a" 0.25(.010) 0.100.10 (.004.004) (stand off) details of "a" part (mounting height) 1.25 +0.20 C0.10 C.004 +.008 .049 0~8 ? 0.500.20 (.020.008) 0.600.15 (.024.006) 0.10(.004)
mb39a113 fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu or any third party or does fujitsu warrant non-infringement of any third-partys intellectual property right or other right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0405 ? fujitsu limited printed in japan
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